1. Field of the Invention
The present invention relates to wafer structures and a method of making the same. More particularly, the invention relates to a method of forming a silicon-on-insulator structure.
2. Description of Related Art
Extensive work has been done on the thinning of silicon on wafers bonded by oxide. For instance, the thinning of silicon has been accomplished by wet silicon etches such as a mixture of HF, HNO.sub.3 and CH.sub.3 COOH. Other wet silicon etches include a mixture of KOH, K.sub.2 Cr.sub.2 O.sub.7, propanol and water as disclosed in D.J. Godbey et al., ECS, Vol. 137, p. 3219 (1990). Yet another wet silicon etch includes a mixture of ethylenediamine-pyrocatechol-water as discussed in K. Ima, Jap. J. Appl. Phys. 30, p. 1154, (1991). The disadvantage of silicon etches is the formation of etch pits at dislocation sites during extensive etch back. By placing an effective wet etching stop layer between the device silicon and the bulk of the silicon wafer, the topographic effects of the etch pits can be reduced. However, the insertion of etch stop layers can produce dislocations in the device silicon by the propagation of dislocations from the stop layer into the device silicon layer during the high temperature (1100.degree. C.) wafer bonding process.
It would thus be desirable to provide a method of thinning silicon on wafers bonded by oxide which eliminates the above-mentioned etch pits caused by dislocation sites, and the dislocation propagation.